FIG. 5 is a circuit diagram showing a circuit configuration of a flyback-type DC-DC converter disclosed in JP-A-2003-33018. Reference numerals 101, 102, and 103 denote a DC power source, a semiconductor switching element, and a transformer, respectively. Reference numerals 104 and 106 denote diodes, and 105 and 107 denote capacitors. Reference numerals 108 and 111 denote an output voltage detecting and adjusting circuit and a control circuit, respectively. The output voltage detecting and adjusting circuit 108 is formed of a comparator 109 and a photocoupler 110 and associated elements. The control circuit 111 is formed of a comparator 112, a triangular wave generating circuit 113, a driver 114 as a driving circuit of the switching element 102, an AND gate 115, and a rectangular wave generating circuit 116.
Next, an operation of the circuit of FIG. 5 will be briefly explained with reference to a waveform diagram shown in FIG. 6. In the DC-DC converter shown in FIG. 5, a PWM control of a period, in which the switching element 102 is turned ON, is carried out so that the value of an output voltage VO matches a reference value VREF for the comparator 109. The output voltage of the output voltage detecting and adjusting circuit 108 is taken as a command value VC. The comparator 112 compares the command value VC with a triangular wave VT from the triangular wave generating circuit 113, by which a PWM signal VM is obtained. The AND gate 115 takes a logical product of the PWM signal VM and the output signal VS of the rectangular wave generating circuit 116 to obtain a driving signal VG. The driving signal VG is applied to the switching element 102 through the driver 114 to turn ON and OFF the switching element 102.
Here, the output signal VS of the rectangular wave generating circuit 116 acts on the switching element 102 to turn ON and OFF the switching element 102 repeatedly when the level of the output signal VS is at the “High” level. When the output signal VS is at the “Low” level, the output signal VS acts on the switching element 102 so as to force the switching element 102 to stop the switching operation. Thus, the output signal VS acts on the switching element 102 to make the switching element 102 carry out an intermittent oscillation operation. Providing such a forced stopping period for the switching element 102, i.e., a period in which the switching is halted temporarily, reduces the number of switching operation per unit time to reduce the switching losses or conduction losses.
The noise included in the command value VC transmitted through the photocoupler 110 prevents a normal comparison (discrimination) between the command value VC and the triangular wave VT as shown in FIG. 6 when the load becomes light to reduce the command value VC. As a result, no PWM signal VM from the comparator 112 becomes temporarily obtainable to produce a period with intermittent failure of the PWM signal VM.
The above-described intermittent oscillation operation of the switching element 102 by the rectangular wave generating circuit 116 and the AND gate 115 is effective for reducing losses, such as switching losses. The intermittent failure of the PWM signal VM, however, makes the essential ON-OFF operation of the switching element 102 incomplete. The switching operation is required during a switching period in which the output signal VS of the rectangular wave generating circuit 116 is at the “High” level. This makes it impossible to obtain a DC output voltage desirable for a DC-DC converter. To prevent the intermittent failure of the PWM signal VM caused by the reduction in the command value VC, a dummy load is connected on the output side of the DC-DC converter to prevent the converter from reaching the light load condition. This, however, reduces the efficiency of the converter.
Accordingly, there remains a need for a DC-DC converter that prevents intermittent failure of a PWM signal VM when the converter is under a light load to output a desired DC voltage to the load. Moreover, there remains a need for a DC-DC converter that requires no dummy load for improving the efficiency of the converter, by which generation of unusual noise from a transformer can be prevented. The present invention addresses these needs.